Manufacturing Signal

Samsung Process Node & 2.5D Interposer Speculation

IBM is expected to use a mature Samsung process (5nm or 3nm class) for its post-Power11 chips rather than chasing the industry's bleeding-edge nodes -- a deliberate, stated strategy, not a limitation.

IBM has been explicit that it does not chase the semiconductor industry's most advanced process nodes for its own sake. Starke has said the move from 7 nanometers to 5 nanometers "did not provide enough benefit for IBM to do it" for the current generation -- a direct statement that IBM evaluates process jumps on delivered customer benefit, not marketing headline node numbers.

For the generation after Power11, analyst reporting (unconfirmed by IBM) expects mature 5-nanometer or 3-nanometer processes from Samsung, continuing IBM's existing foundry relationship, rather than a jump to the 1.8, 1.4, or 1-nanometer nodes some competitors are racing toward. Some analysis further speculates Samsung's 2.5D interposer packaging technology could be part of how IBM implements its chiplet hub-and-spoke design -- but this specific packaging detail has not been confirmed by IBM.

IBM's conservative-node philosophy is a repeated, sourced statement from its own chief architect. The specific 3nm-plus-2.5D-interposer combination for the next generation is industry speculation, not an IBM disclosure.

Frequently Asked

What manufacturing process node will Power 12 use?

Not confirmed. IBM has stated it evaluates process jumps by delivered customer benefit rather than chasing the industry's most advanced nodes -- it skipped 5nm for the current generation because the jump "did not provide enough benefit." Some independent analysis speculates a mature 5nm or 3nm Samsung process, possibly with 2.5D interposer packaging, but this specific detail is unconfirmed.